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[3/8] EXYNOS: PINMUX: Add pinmux support for I2C

Message ID 1337343153-3019-4-git-send-email-rajeshwari.s@samsung.com
State New
Headers show

Commit Message

Rajeshwari Shinde May 18, 2012, 12:12 p.m. UTC 
This patch adds pinmux code for I2C.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
This patch depends on the following patch:
"[U-Boot] [PATCH 1/2] exynos5: pinmux: Added default pinumx settings"
 arch/arm/cpu/armv7/exynos/pinmux.c        |   32 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/pinmux.h |    8 +++++++
 2 files changed, 40 insertions(+), 0 deletions(-)

Comments

Simon Glass June 1, 2012, 1:09 a.m. UTC | #1 
On Fri, May 18, 2012 at 5:12 AM, Rajeshwari Shinde <rajeshwari.s@samsung.com
> wrote:

> This patch adds pinmux code for I2C.
>
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
>

Acked-by: Simon Glass <sjg@chromium.org>


> ---
> This patch depends on the following patch:
> "[U-Boot] [PATCH 1/2] exynos5: pinmux: Added default pinumx settings"
>  arch/arm/cpu/armv7/exynos/pinmux.c        |   32
> +++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-exynos/pinmux.h |    8 +++++++
>  2 files changed, 40 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
> b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 11f4b71..103bcbb 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -170,6 +170,38 @@ int exynos5_pinmux_config(int peripheral, int flags)
>                        s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP);
>                }
>                break;
> +       case PERIPH_ID_I2C0:
> +               s5p_gpio_cfg_pin(&gpio1->b3, 0, GPIO_FUNC(0x2));
> +               s5p_gpio_cfg_pin(&gpio1->b3, 1, GPIO_FUNC(0x2));
> +               break;
> +       case PERIPH_ID_I2C1:
> +               s5p_gpio_cfg_pin(&gpio1->b3, 2, GPIO_FUNC(0x2));
> +               s5p_gpio_cfg_pin(&gpio1->b3, 3, GPIO_FUNC(0x2));
> +               break;
> +       case PERIPH_ID_I2C2:
> +               s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
> +               s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
> +               break;
> +       case PERIPH_ID_I2C3:
> +               s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
> +               s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
> +               break;
> +       case PERIPH_ID_I2C4:
> +               s5p_gpio_cfg_pin(&gpio1->a2, 0, GPIO_FUNC(0x3));
> +               s5p_gpio_cfg_pin(&gpio1->a2, 1, GPIO_FUNC(0x3));
> +               break;
> +       case PERIPH_ID_I2C5:
> +               s5p_gpio_cfg_pin(&gpio1->a2, 2, GPIO_FUNC(0x3));
> +               s5p_gpio_cfg_pin(&gpio1->a2, 3, GPIO_FUNC(0x3));
> +               break;
> +       case PERIPH_ID_I2C6:
> +               s5p_gpio_cfg_pin(&gpio1->b1, 3, GPIO_FUNC(0x4));
> +               s5p_gpio_cfg_pin(&gpio1->b1, 4, GPIO_FUNC(0x4));
> +               break;
> +       case PERIPH_ID_I2C7:
> +               s5p_gpio_cfg_pin(&gpio1->b2, 2, GPIO_FUNC(0x3));
> +               s5p_gpio_cfg_pin(&gpio1->b2, 3, GPIO_FUNC(0x3));
> +               break;
>        default:
>                debug("%s: invalid peripheral %d", __func__, peripheral);
>                return -1;
> diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h
> b/arch/arm/include/asm/arch-exynos/pinmux.h
> index 306f521..b3b7f80 100644
> --- a/arch/arm/include/asm/arch-exynos/pinmux.h
> +++ b/arch/arm/include/asm/arch-exynos/pinmux.h
> @@ -30,6 +30,14 @@
>  *
>  */
>  enum periph_id {
> +       PERIPH_ID_I2C0,
> +       PERIPH_ID_I2C1,
> +       PERIPH_ID_I2C2,
> +       PERIPH_ID_I2C3,
> +       PERIPH_ID_I2C4,
> +       PERIPH_ID_I2C5,
> +       PERIPH_ID_I2C6,
> +       PERIPH_ID_I2C7,
>        PERIPH_ID_SDMMC0,
>        PERIPH_ID_SDMMC1,
>        PERIPH_ID_SDMMC2,
> --
> 1.7.4.4
>
>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 11f4b71..103bcbb 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -170,6 +170,38 @@  int exynos5_pinmux_config(int peripheral, int flags)
 			s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP);
 		}
 		break;
+	case PERIPH_ID_I2C0:
+		s5p_gpio_cfg_pin(&gpio1->b3, 0, GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(&gpio1->b3, 1, GPIO_FUNC(0x2));
+		break;
+	case PERIPH_ID_I2C1:
+		s5p_gpio_cfg_pin(&gpio1->b3, 2, GPIO_FUNC(0x2));
+		s5p_gpio_cfg_pin(&gpio1->b3, 3, GPIO_FUNC(0x2));
+		break;
+	case PERIPH_ID_I2C2:
+		s5p_gpio_cfg_pin(&gpio1->a0, 6, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a0, 7, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C3:
+		s5p_gpio_cfg_pin(&gpio1->a1, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a1, 3, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C4:
+		s5p_gpio_cfg_pin(&gpio1->a2, 0, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a2, 1, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C5:
+		s5p_gpio_cfg_pin(&gpio1->a2, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->a2, 3, GPIO_FUNC(0x3));
+		break;
+	case PERIPH_ID_I2C6:
+		s5p_gpio_cfg_pin(&gpio1->b1, 3, GPIO_FUNC(0x4));
+		s5p_gpio_cfg_pin(&gpio1->b1, 4, GPIO_FUNC(0x4));
+		break;
+	case PERIPH_ID_I2C7:
+		s5p_gpio_cfg_pin(&gpio1->b2, 2, GPIO_FUNC(0x3));
+		s5p_gpio_cfg_pin(&gpio1->b2, 3, GPIO_FUNC(0x3));
+		break;
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h
index 306f521..b3b7f80 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -30,6 +30,14 @@ 
  *
  */
 enum periph_id {
+	PERIPH_ID_I2C0,
+	PERIPH_ID_I2C1,
+	PERIPH_ID_I2C2,
+	PERIPH_ID_I2C3,
+	PERIPH_ID_I2C4,
+	PERIPH_ID_I2C5,
+	PERIPH_ID_I2C6,
+	PERIPH_ID_I2C7,
 	PERIPH_ID_SDMMC0,
 	PERIPH_ID_SDMMC1,
 	PERIPH_ID_SDMMC2,