| Message ID | 1403561904-28935-1-git-send-email-balbi@ti.com |
|---|---|
| State | Accepted |
| Commit | 5ba95541b700d2edecb4d97d4b905f51ed8551b3 |
| Headers | show |
Hi Add USB custodian Il 24/giu/2014 00:18 "Felipe Balbi" <balbi@ti.com> ha scritto: > > Newer AM437x silicon requires us to explicitly power up > the USB2 PHY. By implementing usb_phy_power() we can > achieve that. > > Signed-off-by: Felipe Balbi <balbi@ti.com> > --- > > Changes since v1: > - add macros for USB1_CTRL register and bits > > arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ > drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- > 2 files changed, 21 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > index 15399dc..b5875e3 100644 > --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > @@ -40,6 +40,11 @@ > #define VTP0_CTRL_ADDR 0x44E10E0C > #define VTP1_CTRL_ADDR 0x48140E10 > > +/* USB CTRL Base Address */ > +#define USB1_CTRL 0x44e10628 > +#define USB1_CTRL_CM_PWRDN BIT(0) > +#define USB1_CTRL_OTG_PWRDN BIT(1) > + > /* DDR Base address */ > #define DDR_PHY_CMD_ADDR 0x44E12000 > #define DDR_PHY_DATA_ADDR 0x44E120C8 > diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c > index af46db2..f78d532 100644 > --- a/drivers/usb/phy/omap_usb_phy.c > +++ b/drivers/usb/phy/omap_usb_phy.c > @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap) > > void usb_phy_power(int on) > { > - return; > + u32 val; > + > + /* USB1_CTRL */ > + val = readl(USB1_CTRL); > + if (on) { > + /* > + * these bits are re-used on AM437x to power up/down the USB > + * CM and OTG PHYs, if we don't toggle them, USB will not be > + * functional on newer silicon revisions > + */ > + val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); > + } else { > + val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; > + } > + > + writel(val, USB1_CTRL); > } > #endif /* CONFIG_AM437X_USB2PHY2_HOST */ Michael > > -- > 2.0.0.390.gcb682f8 >
On Tuesday, June 24, 2014 at 04:38:58 PM, Michael Trimarchi wrote: [...] > > index af46db2..f78d532 100644 > > --- a/drivers/usb/phy/omap_usb_phy.c > > +++ b/drivers/usb/phy/omap_usb_phy.c > > @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci > > *omap) > > > void usb_phy_power(int on) > > { > > > > - return; > > + u32 val; > > + > > + /* USB1_CTRL */ > > + val = readl(USB1_CTRL); > > + if (on) { > > + /* > > + * these bits are re-used on AM437x to power up/down the > > USB > > > + * CM and OTG PHYs, if we don't toggle them, USB will not > > be > > > + * functional on newer silicon revisions > > + */ > > + val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); > > + } else { > > + val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; > > + } > > + > > + writel(val, USB1_CTRL); Thanks, please use clrbits_le32() and setbits_le32() here instead. Best regards, Marek Vasut
hi, On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote: > Newer AM437x silicon requires us to explicitly power up > the USB2 PHY. By implementing usb_phy_power() we can > achieve that. > > Signed-off-by: Felipe Balbi <balbi@ti.com> > --- > > Changes since v1: > - add macros for USB1_CTRL register and bits same here. Still pending, am437x will remain broken until this is applied. cheers > > arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ > drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- > 2 files changed, 21 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > index 15399dc..b5875e3 100644 > --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > @@ -40,6 +40,11 @@ > #define VTP0_CTRL_ADDR 0x44E10E0C > #define VTP1_CTRL_ADDR 0x48140E10 > > +/* USB CTRL Base Address */ > +#define USB1_CTRL 0x44e10628 > +#define USB1_CTRL_CM_PWRDN BIT(0) > +#define USB1_CTRL_OTG_PWRDN BIT(1) > + > /* DDR Base address */ > #define DDR_PHY_CMD_ADDR 0x44E12000 > #define DDR_PHY_DATA_ADDR 0x44E120C8 > diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c > index af46db2..f78d532 100644 > --- a/drivers/usb/phy/omap_usb_phy.c > +++ b/drivers/usb/phy/omap_usb_phy.c > @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap) > > void usb_phy_power(int on) > { > - return; > + u32 val; > + > + /* USB1_CTRL */ > + val = readl(USB1_CTRL); > + if (on) { > + /* > + * these bits are re-used on AM437x to power up/down the USB > + * CM and OTG PHYs, if we don't toggle them, USB will not be > + * functional on newer silicon revisions > + */ > + val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); > + } else { > + val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; > + } > + > + writel(val, USB1_CTRL); > } > #endif /* CONFIG_AM437X_USB2PHY2_HOST */ > > -- > 2.0.0.390.gcb682f8 >
On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote: > hi, > > On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote: > > Newer AM437x silicon requires us to explicitly power up > > the USB2 PHY. By implementing usb_phy_power() we can > > achieve that. > > > > Signed-off-by: Felipe Balbi <balbi@ti.com> > > --- > > > > Changes since v1: > > - add macros for USB1_CTRL register and bits > > same here. Still pending, am437x will remain broken until this is > applied. What do you need for .07, this and 1/2 of this series ? Or did I miss something else? In any case, sorry, will apply them once I know which ones. Best regards, Marek Vasut
On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote: > On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote: > > hi, > > > > On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote: > > > Newer AM437x silicon requires us to explicitly power up > > > the USB2 PHY. By implementing usb_phy_power() we can > > > achieve that. > > > > > > Signed-off-by: Felipe Balbi <balbi@ti.com> > > > --- > > > > > > Changes since v1: > > > - add macros for USB1_CTRL register and bits > > > > same here. Still pending, am437x will remain broken until this is > > applied. > > What do you need for .07, this and 1/2 of this series ? Or did I miss > something else? > > In any case, sorry, will apply them once I know which ones. Yes, 1/2 and 2/2 are the missing USB bits..
Hi Tom On Wed, Jul 9, 2014 at 2:41 PM, Tom Rini <trini@ti.com> wrote: > On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote: >> On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote: >> > hi, >> > >> > On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote: >> > > Newer AM437x silicon requires us to explicitly power up >> > > the USB2 PHY. By implementing usb_phy_power() we can >> > > achieve that. >> > > >> > > Signed-off-by: Felipe Balbi <balbi@ti.com> >> > > --- >> > > >> > > Changes since v1: >> > > - add macros for USB1_CTRL register and bits >> > >> > same here. Still pending, am437x will remain broken until this is >> > applied. >> >> What do you need for .07, this and 1/2 of this series ? Or did I miss >> something else? >> >> In any case, sorry, will apply them once I know which ones. > > Yes, 1/2 and 2/2 are the missing USB bits.. > Marek comment out about using clrbits and setbits. So it's better to resend them Michael > -- > Tom > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot >
On Wednesday, July 09, 2014 at 02:48:55 PM, Michael Trimarchi wrote: > Hi Tom > > On Wed, Jul 9, 2014 at 2:41 PM, Tom Rini <trini@ti.com> wrote: > > On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote: > >> On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote: > >> > hi, > >> > > >> > On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote: > >> > > Newer AM437x silicon requires us to explicitly power up > >> > > the USB2 PHY. By implementing usb_phy_power() we can > >> > > achieve that. > >> > > > >> > > Signed-off-by: Felipe Balbi <balbi@ti.com> > >> > > --- > >> > > > >> > > Changes since v1: > >> > > - add macros for USB1_CTRL register and bits > >> > > >> > same here. Still pending, am437x will remain broken until this is > >> > applied. > >> > >> What do you need for .07, this and 1/2 of this series ? Or did I miss > >> something else? > >> > >> In any case, sorry, will apply them once I know which ones. > > > > Yes, 1/2 and 2/2 are the missing USB bits.. > > Marek comment out about using clrbits and setbits. So it's better > to resend them Wasn't this fixed in the V2 ? Best regards, Marek Vasut
On Tuesday, June 24, 2014 at 12:18:24 AM, Felipe Balbi wrote: > Newer AM437x silicon requires us to explicitly power up > the USB2 PHY. By implementing usb_phy_power() we can > achieve that. > > Signed-off-by: Felipe Balbi <balbi@ti.com> Applied 1/2 and 2/2 v2 , thanks. Best regards, Marek Vasut
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index 15399dc..b5875e3 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -40,6 +40,11 @@ #define VTP0_CTRL_ADDR 0x44E10E0C #define VTP1_CTRL_ADDR 0x48140E10 +/* USB CTRL Base Address */ +#define USB1_CTRL 0x44e10628 +#define USB1_CTRL_CM_PWRDN BIT(0) +#define USB1_CTRL_OTG_PWRDN BIT(1) + /* DDR Base address */ #define DDR_PHY_CMD_ADDR 0x44E12000 #define DDR_PHY_DATA_ADDR 0x44E120C8 diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index af46db2..f78d532 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap) void usb_phy_power(int on) { - return; + u32 val; + + /* USB1_CTRL */ + val = readl(USB1_CTRL); + if (on) { + /* + * these bits are re-used on AM437x to power up/down the USB + * CM and OTG PHYs, if we don't toggle them, USB will not be + * functional on newer silicon revisions + */ + val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); + } else { + val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; + } + + writel(val, USB1_CTRL); } #endif /* CONFIG_AM437X_USB2PHY2_HOST */
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that. Signed-off-by: Felipe Balbi <balbi@ti.com> --- Changes since v1: - add macros for USB1_CTRL register and bits arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-)