| Message ID | 1334421743-31146-10-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | Accepted |
| Commit | 0cc892fd97b2d232ae45a30aec342a2e0fb148aa |
| Headers | show |
Am 14.04.2012 18:42, schrieb Peter Maydell: > Move the iWMMXT wCID reset to cpu_state_reset(). Since > we use the same value for all CPUs with this feature > (with the major/minor revision fields set to the QEMU > specific 'Q' value) there's no need to create an ARMCPU > field just for this. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> /-F
diff --git a/target-arm/helper.c b/target-arm/helper.c index 3e31f94..319614a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -121,7 +121,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) case ARM_CPUID_PXA270_B1: case ARM_CPUID_PXA270_C0: case ARM_CPUID_PXA270_C5: - env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; break; case ARM_CPUID_SA1100: case ARM_CPUID_SA1110: @@ -161,6 +160,10 @@ void cpu_state_reset(CPUARMState *env) env->cp15.c0_cachetype = cpu->ctr; env->cp15.c1_sys = cpu->reset_sctlr; + if (arm_feature(env, ARM_FEATURE_IWMMXT)) { + env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; + } + #if defined (CONFIG_USER_ONLY) env->uncached_cpsr = ARM_CPU_MODE_USR; /* For user mode we must enable access to coprocessors */
Move the iWMMXT wCID reset to cpu_state_reset(). Since we use the same value for all CPUs with this feature (with the major/minor revision fields set to the QEMU specific 'Q' value) there's no need to create an ARMCPU field just for this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target-arm/helper.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)