| Message ID | 1400766819-22286-2-git-send-email-lee.jones@linaro.org |
|---|---|
| State | New |
| Headers | show |
Hi, On Thursday 22 May 2014 07:23 PM, Lee Jones wrote: > The MiPHY365x is a Generic PHY which can serve various SATA or PCIe > devices. It has 2 ports which it can use for either; both SATA, both > PCIe or one of each in any configuration. I've asked others who wrote multi-phy PHY providers to model each individual PHY as sub-node of the PHY provider. So It's only fair I ask you the same to do. So in this case the dt node should look something like: miphy365x_phy: miphy365x@fe382000 { compatible = "st,miphy365x-phy"; #phy-cells = <2>; st,syscfg = <&syscfg_rear>; channel@0 { reg = <0xfe382000 0x100>, <0xfe394000 0x100>; reg-names = "sata", "pcie"; } channel@1{ reg = <0xfe38a000 0x100>, <0xfe804000 0x100>; reg-names = "sata", "pcie"; } }; Thanks Kishon -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
> > The MiPHY365x is a Generic PHY which can serve various SATA or PCIe > > devices. It has 2 ports which it can use for either; both SATA, both > > PCIe or one of each in any configuration. > > I've asked others who wrote multi-phy PHY providers to model each individual > PHY as sub-node of the PHY provider. So It's only fair I ask you the same to > do. So in this case the dt node should look something like: > > miphy365x_phy: miphy365x@fe382000 { > compatible = "st,miphy365x-phy"; > #phy-cells = <2>; > st,syscfg = <&syscfg_rear>; > channel@0 { > reg = <0xfe382000 0x100>, <0xfe394000 0x100>; > reg-names = "sata", "pcie"; > } > > channel@1{ > reg = <0xfe38a000 0x100>, <0xfe804000 0x100>; > reg-names = "sata", "pcie"; > } > > }; I'm interested to know why you've taken this approach, as it makes the code much more complex. The DT framework goes to the trouble of converting all addresses to to resources so drivers can easily pull them out using platform_get_resource() and friends. Pushing the reg properties down into a child node means that we have to now iterate over the sub-nodes and pull them out manually. This will lead to a pretty messy implementation IMHO. Can you point me in the direction of previous implementations where you have stipulated the same set of constraints please?
diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt new file mode 100644 index 0000000..cb39de1 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt @@ -0,0 +1,62 @@ +STMicroelectronics STi MIPHY365x PHY binding +============================================ + +This binding describes a miphy device that is used to control PHY hardware +for SATA and PCIe. + +Required properties: +- compatible : Should be "st,miphy365x-phy" +- #phy-cells : Should be 2 (See second example) + First cell is the port number from: + - MIPHY_PORT_0 + - MIPHY_PORT_1 + Second cell is device type from: + - MIPHY_TYPE_SATA + - MIPHY_TYPE_PCI +- reg : Address and length of register sets for each device in + "reg-names" +- reg-names : The names of the register addresses corresponding to the + registers filled in "reg", from: + - sata0: For SATA port 0 registers + - sata1: For SATA port 1 registers + - pcie0: For PCIE port 0 registers + - pcie1: For PCIE port 1 registers +- st,syscfg : Should be a phandle of the system configuration register group + which contain the SATA, PCIe mode setting bits + +Optional properties: +- st,sata-gen : Generation of locally attached SATA IP. Expected values + are {1,2,3). If not supplied generation 1 hardware will + be expected +- st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp) +- st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp) + +Example: + + miphy365x_phy: miphy365x@fe382000 { + compatible = "st,miphy365x-phy"; + #phy-cells = <2>; + reg = <0xfe382000 0x100>, + <0xfe38a000 0x100>, + <0xfe394000 0x100>, + <0xfe804000 0x100>; + reg-names = "sata0", "sata1", "pcie0", "pcie1"; + st,syscfg = <&syscfg_rear>; + }; + +Specifying phy control of devices +================================= + +Device nodes should specify the configuration required in their "phys" +property, containing a phandle to the miphy device node, a port number +and a device type. + +Example: + +#include <dt-bindings/phy/phy-miphy365x.h> + + sata0: sata@fe380000 { + ... + phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>; + ... + };